Efficient x87 code generation

Jato uses the SSE1 instruction set for floating point arithmetic but we obviously need to support the older stack-based x87 instruction set if we want to be able to run JIT'd code on older CPUs. There are some papers out there that suggest mapping the stack-based bytecode instructions to x87 but implementing something like that is probably going to be painful because all other bytecodes are converted to register based representation in the front-end.

Luckily, it turns out that the recommended programming model for the x87 instruction is much simpler than that. Quoting the paper "Some notes on the new MLRISC x86 floating point code generator (draft)":

[...] the preferred code generation methodology advocated by the Intel optimization guide [Cor97] is to treat the floating point stack as a bank of 8 registers, and use the fxch instruction to to swap contents of the stack as needed. The instruction fxch is implemented as register renaming internally by the processor and incurs no cost if paired with most floating point instructions.

The paper goes on to explain how you are basically able to "by-pass" the stack model with the fxch instruction and pretend that you have 8 normal FPU registers for register allocation. The approach requires an instruction rewriting phase before code emission but overall, it's a much better fit for Jato than having to deal with the x87 stack.